NERSC is offering training on using KNL (and Cori Phase II) on Thursday 3 November, which some of you in ESP land might be interested in attending. Â You can sign up to attend remotely (via Zoom videoconferencing). For information see the CORI KNL TRAINING webpage.
Thanks to all who attended the ALCF Theta ESP Hands-on Workshop (16-19 August 2016 at Argonne). We had representation from all 12 Tier 1 and Tier 2 Theta ESP projects, and some good instruction and hands-on help from Intel and Cray experts. Once we sorted out how to use aprun (lesson learned by workshop organizers there), people got some benchmarks and scaling studies done.Â ALCFÂ got positive feedback from several participants about the overall experience, and I encourage participants to share any further comments (positive or negative) via the blog or email to firstname.lastname@example.org.
For those of you writing an Aurora ESP proposal, the deadline is tomorrow,Â Friday 2 Sep 2016. Contact email@example.com with any questions/issues.
The Intel Xeon Phi Users Group (IXPUG) will be holding its 2016 Annual Meeting this year at Argonne National Laboratory, 19-23 September 2016. The Call for Presentations is open until 18 August 2016. Even if you don’t plan to attend, you may be interested inÂ joining IXPUG.
We are pleased to announce that the Call for Proposals for the Aurora Early Science Program is now open. The deadline for submission is Sept. 2, 2016. Feel free to share this information with those you think might be interested in submitting a proposal.
Those of you on Theta ESP project teams should have received an email yesterday with a link to the registration page for the August hands-on workshop. Please do not share it beyond your project team; attendance is only open to ESP project team membersâspecifically the right people to make progress running, scaling, and benchmarking the project applications on Theta.
There are now links to KNL presentations given at this week’s IXPUG WorkshopÂ at the ISC16 conference. (IXPUG = Intel Xeon Phi Users Group)
We now have two more KNL white box nodes available to ESP users, for a total of three. You were directly emailed with access instructions a while back. If you lost those instructions or otherwise have questions about access, email firstname.lastname@example.org
We anticipate the arrival of 8 single-node KNL systems in May.Â Those systems will be made available to all ESP project team members, with no requirement that your home institution has signed the MP-NDA agreement with Intel. Email will go out to everyone when the systems are available, with instructions for access and usage.
You may find this website useful for finding and discussing information about the Intel KNL chip:
NERSC is offering an Advanced OpenMP training day this Thursday. Itâs still possible to sign up to attend virtually (Zoom), if youâre interested. If you don’t have a NERSC login id, indicate on the registration form that you heard about the training via the ALCF Early Science Program:
Dear NERSC users,
We are pleased to announce a one-day training on “Advanced OpenMPâ:
Speakers: Michael Klemm, Intel (OpenMP Language Committee Member),
Â Â Bronis R. de Supinski, LLNL (Chair of the OpenMP Language Committee)
Time: Thursday, February 4, 9am – 5pm PST
Location: NERSC/LBNL (attend in person or remote)
The OpenMP 4.5 specification was released in November 2015. This tutorial will quickly review the basics of OpenMP programming, with the assumption that attendees understand basic parallelization concepts. Next, the tutorial will detail performance tuning aspects, such as memory placement and affinity considerations, and exploitation of vector units. The presenters will then discuss advanced OpenMP language features in-depth, with an emphasis on tasking, cancellation and new additions in OpenMP 4.5. Using OpenMP from an MPI application and potential pitfalls will also be discussed.
Levels of the tutorial materials are: beginner 10%, intermediate 45%, and advanced 45%. Afternoon hands-on sessions on OpenMP Analysis in VTune and Using SIMD will use the NERSC Cori (Cray XC40 with Intel Haswell processors) and Babbage (Intel Xeon Phi KNC testbed) systems.
Please find more detailed tutorial description, speakers bio, registration, agenda, and in person and remote attendance information at:
In person registration will close on Thursday, January 28.
NERSC User Services